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8811-IO-DC-01燃機模塊
VMEbus從接口XVME-660通過訪問VMEbus從映像或通過DMA通道啟動事務。有八個PCI從映像。從屬映像15具有4kb分辨率；其他（2-4、6-8）的分辨率為64KB。奴隸形象1到8已經(jīng)在XVME-660上實現(xiàn)，A24或A32個VMEbus循環(huán)。
XVME-660 BIOS從機1對應于Tundra Universe從機0直到對應于宇宙從機7的BIOS從機8。
地址模式和類型基于VMEbus從映像進行編程。VMEbus從循環(huán)的VMEbus內(nèi)存地址位置由基本和指定綁定地址。PCI地址通過將基地址添加到轉(zhuǎn)換偏移地址來計算。轉(zhuǎn)換地址的設(shè)置取決于從機編號和BIOS設(shè)置。有三種情況：從設(shè)備3-8：當宇宙芯片通電時，轉(zhuǎn)換地址默認為零騎自行車。對轉(zhuǎn)換地址的任何更改都會在電源循環(huán)時丟失。
從機1-2，BIOS引導菜單從機1和2操作模式設(shè)置為可編程：BIOS在啟動時將轉(zhuǎn)換地址設(shè)置為零。翻譯有任何變化嗎地址在任何啟動時都會被零覆蓋。
從機1-2，BIOS引導菜單從機1和2操作模式設(shè)置為兼容：轉(zhuǎn)換地址由BIOS設(shè)置。
第一個VMEbus從映像將基本和綁定寄存器設(shè)置為640KB
通過BIOS。例如：VMEbus從映像0:BS=0000000 h BD=A0000h至=0000000 h
第二個VMEbus從映像將使基寄存器設(shè)置為連續(xù)BIOS使用來自第一VMEbus從映像的綁定寄存器。
界限寄存器受總XVME-660 DRAM限制。
翻譯偏移寄存器為：偏移量為384 KB，相當于
XVME-660板。例如：VMEbus從映像1:BS=A0000h BD=400000h至=060000h
筆記有關(guān)更改轉(zhuǎn)換地址的信息，請參閱Universe芯片手冊和PCI總線規(guī)范。
XVME-660 DRAM內(nèi)存基于PC架構(gòu)，不連續(xù)。
可以設(shè)置VMEbus從映像以允許該DRAM顯示為一個連續(xù)塊。如果VMEbus從映像窗口始終配置有1 MB的平移偏移量。來自用戶和軟件從觀點來看，這是可取的，因為中斷向量表、系統(tǒng)參數(shù)和通信緩沖器（鍵盤）放置在低DRAM中。這提供了更多的系統(tǒng)保護
VMEbus Slave Interface
The XVME-660 acts as a VMEbus slave by accessing a VMEbus slave image or by the
DMA channel initiating a transaction. There are eight PCI slave images. Slave images 1
and 5 have a 4 KB resolution; the others (2-4, 6-8) have a 64 KB resolution. Slave images
1 through 8 have been implemented on the XVME-660. The slave can respond to A16,
A24, or A32 VMEbus cycles.
Note
XVME-660 BIOS Slave 1 corresponds to Tundra Universe Slave 0 and
so on, up to BIOS Slave 8 corresponding to Universe Slave 7.
The address mode and type are programmed on a VMEbus slave image basis. The VMEbus memory address location for the VMEbus slave cycle is specified by the base and
bound address. The PCI address is calculated by adding the base address to the translation offset address. The translation address is set differently depending on the Slave number and on the BIOS settings. There are three cases:
Slaves 3-8: The translation address defaults to zero when the Universe chip is power
cycled. Any changes to the translation address are lost on power cycling.
Slave 1-2, BIOS Boot menu Slave 1 & 2 Operational Mode set to Programmable: The
BIOS sets the translation address to zero on boot up. Any changes to the translation
address are overwritten with a zero on any boot.
Slave 1-2, BIOS Boot menu Slave 1 & 2 Operational Mode set to Compatible: The translation address is set by the BIOS.
The first VMEbus slave image will have the base and bound register set to 640 KB
by the BIOS. For example:
VMEbus Slave Image 0: BS= 0000000h BD= A0000h TO = 0000000h
The second VMEbus slave image will have the base register set to be contiguous
with the bound register from the first VMEbus Slave image by the BIOS. The bound
register is limited by the total XVME-660 DRAM. The translation offset register is
offset by 384 KB, which is equivalent to the A0000h-FFFFFh range on the
XVME-660 board. For example:
VMEbus Slave Image 1: BS=A0000h BD= 400000h TO = 060000h
Note
For information on changing the translation addresses, see the Universe
chip manual and the PCI bus specification.
The XVME-660 DRAM memory is based on the PC architecture and is not contiguous.
The VMEbus slave images may be set up to allow this DRAM to appear as one contiguous block.
Mapping defined by the PC architecture can be overcome if the VMEbus slave image
window is always configured with a 1 MB translation offset. From a user and software
standpoint, this is desirable because the interrupt vector table, system parameters, and
communication buffers (keyboard) are placed in low DRAM. This provides more system protection.
