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3BSE040662R1熱電偶模塊
信號“VTSup”表示距離函數(shù)正在被v.t.監(jiān)督和“VTSupDel”阻止，12秒延遲正在運(yùn)行。
3.5.31.7.跳閘邏輯（見第4.8.5.12節(jié)。）
用于確定跳閘邏輯的參數(shù)分組如下：子菜單“行程計劃”。
通過設(shè)置參數(shù)“馬桶”（3 x推桿、POTT和超出范圍阻塞方案）。下面給出了可能的設(shè)置。這個
不同方案的設(shè)置僅在具有方案后顯示已選擇。允許超范圍轉(zhuǎn)換跳閘“弱”-啟用弱進(jìn)料邏輯。
“解鎖”-選擇通信的啟用邏輯信道故障。
“回聲”-啟用回聲邏輯。
“TransBl”-啟用故障能量反轉(zhuǎn)邏輯“t1TransBl”-錯誤能量方向的最小保持時間
信號這必須設(shè)置為至少長50 ms超過通信信道。
“t2TransBl”-錯誤能量方向的最大保持時間信號這必須設(shè)置為至少長0.4秒而不是死區(qū)時間設(shè)置，以確保
如果嘗試，阻止仍然有效使故障線路重新閉合。阻塞方案“TransBl”-啟用故障能量反轉(zhuǎn)邏輯
“t1Block”-接收PLC信號所允許的時間“t1TransBl”-錯誤能量方向的最小保持時間
信號這必須設(shè)置為至少長50 ms大于最大信號傳輸時間。
“t2TransBl”-錯誤能量方向的最大保持時間
信號這必須設(shè)置為至少長0.4秒而不是死區(qū)時間設(shè)置，以確保
如果嘗試，阻止仍然有效使故障線路重新閉合。
三模式根據(jù)參數(shù)“跳閘模式”的設(shè)置，跳閘為任一相位選擇，由二進(jìn)制輸入“1極”控制
（對于“1phTrip”），始終為三相（對于“3phTrip”）或三相在時間“延遲（3）”之后（對于“3phTripDel3”），通過選擇參數(shù)“SOTF模式”，可以訪問開關(guān)故障邏輯設(shè)置。提出的備選方案如下：
故障邏輯開關(guān)是否應(yīng)根據(jù)以下條件跳閘：無方向低阻抗起動器或超范圍區(qū)
該邏輯由欠壓功能延遲啟用通過10 s或200 ms（見第3.5.31.2.6節(jié)）或二進(jìn)制輸入“截止日期”和“手動關(guān)閉”。
The signal ‘VTSup’ indicates that the distance function is being
blocked by the v.t. supervision and ‘VTSupDel’ that the 12 s delay is running.
3.5.31.7. Tripping logic
(see Section 4.8.5.12.)
The parameters for determining the tripping logic are grouped in
the sub-menu ‘Trip Schemes’.
The various transfer tripping schemes are selected by setting the
parameter ‘ComMode’ (3 x PUTT, POTT and OVERREACHING
BLOCKING schemes). The possible settings are given below. The
settings for the different schemes only appear after has scheme
has been selected.Permissive overreaching transfer tripping
‘Weak’ - enables the weak infeed logic.
‘Unblock’ - selects the enabling logic for communications
channel failure.
‘Echo’ - enables the echo logic.
‘TransBl’ - enables the logic for reversal of fault energy
‘t1TransBl’ - min. holding time for the wrong energy direction
signal. This has to be set at least 50 ms longer
than the maximum reset time required by the
communication channel.
‘t2TransBl’ - max. holding time for the wrong energy direction
signal. This has to be set at least 0.4 s longer
than the dead time setting to make sure that
blocking is still effective should an attempt be
made to reclose the faulted line.Blocking scheme
‘TransBl’ - enables the logic for reversal of fault energy
‘t1Block’ - time allowed for the receipt of a PLC signal
‘t1TransBl’ - min. holding time for the wrong energy direction
signal. This has to be set at least 50 ms longer
than the maximum signal transmission time.
‘t2TransBl’ - max. holding time for the wrong energy direction
signal. This has to be set at least 0.4 s longer
than the dead time setting to make sure that
blocking is still effective should an attempt be
made to reclose the faulted line.
TripMode
Depending on the setting of the parameter ‘TripMode’, tripping is
either phase-selective, controlled by the binary input ‘1PolAR’
(for ‘1phTrip’), always three-phase (for ‘3phTrip’) or three-phase
after the time ‘Delay (3)’ (for ‘3phTripDel3’)Access is gained to the switch-onto-fault logic settings by selecting the parameter ‘SOTF Mode’. The alternatives presented are
whether the switch-onto-fault logic should trip on the basis of the
non-directional underimpedance starters or the overreaching
zone.
This logic is enabled either by the undervoltage function delayed
by 10 s or 200 ms (see Section 3.5.31.2.6) or the binary inputs
‘Deadline’ and ‘Manual close’.
