GFD212A使用范圍,ABB輸入模塊
可編程間隔計(jì)時(shí)器（8254）8254是一種具有六種不同定時(shí)功能的多功能計(jì)數(shù)器/計(jì)時(shí)器設(shè)備操作模式。然而，這里只描述了一種模式。該模式是調(diào)用速率生成器。使用此模式，電路板的操作類(lèi)似于數(shù)據(jù)記錄器?；旧?，該模式的功能類(lèi)似于除以n計(jì)數(shù)器。計(jì)數(shù)器加載了n個(gè)計(jì)數(shù)，然后通過(guò)在中設(shè)置一個(gè)位來(lái)指示開(kāi)始計(jì)數(shù)CSR（計(jì)數(shù)起始H數(shù)據(jù)位10）。當(dāng)計(jì)數(shù)減少到“一”時(shí)，a產(chǎn)生脈沖，啟動(dòng)先前已完成的A/D掃描序列已編程。掃描順序必須是掃描中斷模式或掃描輪詢模式，如第4.4.2節(jié)所述和4.4.3。
GFD212A使用范圍掃描完成且電路板處于掃描中斷時(shí)模式下，將向主機(jī)CPU發(fā)出掃描結(jié)束中斷。否則，CPU必須輪詢CSR中注冊(cè)的掃描結(jié)束H位，以確定何時(shí)進(jìn)行掃描完成。然后CPU讀取雙端口寄存器。同時(shí)間隔計(jì)時(shí)器重新加載計(jì)數(shù)器并再次開(kāi)始計(jì)數(shù)。這個(gè)計(jì)數(shù)時(shí)間間隔必須大于讀取所有雙精度計(jì)數(shù)器所需的時(shí)間端口寄存器加上A/D掃描序列完成的時(shí)間。這次是掃描所有64個(gè)通道時(shí)約2毫秒。
8254有三個(gè)16位寬度的計(jì)數(shù)器。計(jì)數(shù)器時(shí)鐘為8 MHz這導(dǎo)致計(jì)時(shí)器分辨率為125 ns或0.125μs。如果加載FFFF十六進(jìn)制的最大計(jì)數(shù)，將生成開(kāi)始掃描脈沖每8.192毫秒一次。確定如下：216=65536（加載計(jì)數(shù)的十進(jìn)制等效值）x0.125x10-6（8 MHz時(shí)鐘周期）=8.192x10-3秒?？梢约?jí)聯(lián)三個(gè)16位計(jì)數(shù)器以形成48位計(jì)數(shù)器。二計(jì)數(shù)器級(jí)聯(lián)在一起并加載所有“一”將生成開(kāi)始掃描每8分57秒脈搏一次。參考第5.4.5節(jié)確定級(jí)聯(lián)計(jì)數(shù)器的跳線配置?？删幊潭〞r(shí)器占用4個(gè)字的地址空間及其相對(duì)地址如表4.1-1所示。對(duì)可編程定時(shí)器的每次寫(xiě)入都是一個(gè)字長(zhǎng)（D15至D0），其中所有必要信息包含在低位字節(jié)（D7到D0）。8254中每個(gè)寄存器的相對(duì)地址為如表4.4.6-1所示。
Programmable Interval Timer (8254)
The 8254 is a very versatile counter/timer device with six different timing
modes of operation. However, only one mode is described here. That mode is
called RATE GENERATOR. Using this mode allows the board to operate similar to
a data-logger. Basically this mode functions like a divide-by-n counter. Thecounter is loaded with n counts and is then told to start counting by setting a bit in
the CSR (count START H-data bit 10). When the count has decremented to "one", a
pulse is generated which starts the A/D scanning sequence which has previously
been programmed. The scanning sequence must be either the SCANNING
INTERRUPT MODE or the SCANNING POLL MODE as discussed in Sections 4.4.2
and 4.4.3.
When the scan is done and the board is in the SCANNING INTERRUPT
MODE, an end-of-scan interrupt will be issued to the host CPU. Otherwise, the CPU
must poll the registered end-of-scan H bit in the CSR to determine when the scan is
done. The dual port registers are then read by the CPU. Concurrently with this, the
Interval Timer reloads the counter and begins counting again. The
counting time interval must be longer than the time required to read all the dual
port registers plus the time for the A/D scan sequence to complete. This time is
approximately 2 ms when all 64 channels are being scanned.
The 8254 has three counters of 16-bit width. The counter clock is 8 MHz
which results in timer resolution of 125 ns or 0.125 μs. One 16-bit counter, if
loaded with a maximum count of FFFF HEX, would generate a start scan pulse
every 8.192 ms. This is determined as follows:
216 = 65,536 (Decimal equivalent of loaded count)
x0.125x10-6 (Period of 8 MHz Clock) = 8.192x10-3 second Three 16-bit counters may be cascaded to make a 48-bit counter. Two
counters cascaded together and loaded with all "ones" would generate a start scan
pulse every eight minutes and 57 seconds. Refer to Section 5.4.5 to determine
jumper configurations for cascading counters.
The Programmable Timer occupies 4 words of address space and its
relative address is shown in Table 4.1-1. Each write to the Programmable Timer is a
word in length (D15 to D0) of which all necessary information is contained in the
lower byte (D7 through D0). The relative address of each register in the 8254 is
shown in Table 4.4.6-1.
