GDD471A001使用說明,ABB自動(dòng)化模塊
初始化當(dāng)系統(tǒng)重置應(yīng)用于電路板時(shí)，控制寄存器和所有模數(shù)轉(zhuǎn)換器（ADC）標(biāo)志被清除為低狀態(tài)“零”。一通過設(shè)置軟件重置，可以生成獨(dú)立板重置將控制位設(shè)置為“1”。電路板將保持復(fù)位，直到軟件復(fù)位位已清除。4.4控制和讀取模數(shù)轉(zhuǎn)換器數(shù)據(jù)VMIVME-3112具有許多功能，允許電路板用于各種應(yīng)用。最簡(jiǎn)單的操作模式是自動(dòng)通電時(shí)自動(dòng)進(jìn)入的掃描模式。
GDD471A001使用說明4.4.1自動(dòng)掃描模式該模式在通電時(shí)進(jìn)入，或者CSR可編程為進(jìn)入此模式。自動(dòng)掃描模式允許用戶操作無需在CSR中設(shè)置任何控制位，也無需選擇每個(gè)控制位要轉(zhuǎn)換的通道。通電時(shí)，VMIVME-3112啟動(dòng)轉(zhuǎn)換通道0并通過所需的最后一個(gè)通道順序執(zhí)行轉(zhuǎn)換，然后在通道0處再次開始。每次轉(zhuǎn)換后，該通道的數(shù)據(jù)存儲(chǔ)在一種雙端口寄存器，VMEbus也可以訪問該寄存器，并且可以在任何時(shí)間讀取該寄存器時(shí)間跳線字段J6控制掃描的通道數(shù)。請(qǐng)參閱第節(jié)5用于這些跳線的配置。增益放大器必須設(shè)置為增益自動(dòng)掃描模式中的“一”。必須至少有16個(gè)通道在板上安裝過濾器時(shí)掃描。參考第3.6.1節(jié)。
每次掃描連接的輸入通道都會(huì)產(chǎn)生數(shù)字化數(shù)據(jù)寫入掃描數(shù)據(jù)寄存器，從而覆蓋前一個(gè)掃描每次執(zhí)行讀取時(shí)，都會(huì)收到最新的數(shù)據(jù)。要進(jìn)入自動(dòng)掃描模式（通電時(shí)自動(dòng)進(jìn)入），必須設(shè)置以下CSR位：掃描輪詢模式掃描輪詢模式對(duì)輸入進(jìn)行單次掃描通道，但在最后一個(gè)通道數(shù)字化后停止掃描過程。然后在狀態(tài)寄存器中設(shè)置REGD掃描結(jié)束H標(biāo)志（位D13）。輪詢?cè)撐辉试SCPU板確定掃描何時(shí)完成已完成，掃描數(shù)據(jù)寄存器已更新數(shù)據(jù)?？删幊潭〞r(shí)器（8254）可以被設(shè)置為周期性地生成啟動(dòng)掃描輪詢模式的信號(hào)。例如，計(jì)時(shí)器可以是編程為每秒產(chǎn)生一次脈沖，開始掃描。這個(gè)CPU仍然必須輪詢掃描H位的REGD端，直到它變高，因此掃描中斷模式更適合與計(jì)時(shí)器一起使用。這個(gè)可編程定時(shí)器（8254）編程注意事項(xiàng)詳見第4.4.6節(jié)。
INITIALIZATION
When SYSTEM RESET is applied to the board, the Control Register and
all Analog-to-Digital Converter (ADC) flags are cleared to the LOW state "zero". An
independent BOARD RESET can be generated by setting the SOFTWARE RESET
control bit to a "one". The board will remain reset until the SOFTWARE RESET bit
is cleared.
4.4 CONTROLLING AND READING THE ANALOG-TO-DIGITAL CONVERTER
DATA
The VMIVME-3112 has a number of features which allow the board to be
used in a variety of applications. The simplest mode of operation is the AUTO
SCANNING MODE which is automatically entered at power-up.
4.4.1 AUTO SCANNING MODE
This mode is entered at power-up, or the CSR may be programmed to
enter this mode. The AUTO SCANNING MODE allows the user to operate the
board without setting any control bits in the CSR and without selecting each
channel to be converted. On power-up the VMIVME-3112 initiates a conversion on
CH 0 and sequentially performs conversions through the last channel desired, then
begins again at CH 0. After each conversion, the data for that channel is stored in
a dual port register which is also accessible to the VMEbus and may be read at any
time. Jumper field J6 controls how many channels are scanned. Refer to Section
5 for configuration of these jumpers. The gain amplifier must be set to a gain of
"one" in the AUTO SCANNING MODE. A minimum of 16 channels must be
scanned when filters are installed on the board. Refer to Section 3.6.1.
Every scan of the connected input channels results in digitized data
written to the SCAN DATA registers, thus, overwriting the data from the previous
scan. Any time a read is performed the latest data is always received.
To enter the AUTO SCANNING MODE (automatically entered at power-up),
the following CSR bits must be set:SCANNING POLL MODE
The SCANNING POLL MODE performs a single scan of the input
channels, but stops the scanning process after the last channel has been digitized.
The REGD END OF SCAN H flag (bit D13) is then set in the Status Register. Polling this bit allows the CPU board to determine when the scan has been
completed and the SCAN DATA registers have updated data. The Programmable Timer (8254) may be set to periodically generate a
signal which starts the SCANNING POLL MODE. For example, the timer may be
programmed to generate a pulse once every second which starts the scan. The
CPU must still poll the REGD END OF SCAN H bit until it goes high, so the
SCANNING INTERRUPT MODE is a better candidate for use with the timer. The
Programmable Timer (8254) programming considerations are detailed in
Section 4.4.6.
