LT9673a模塊,ABB英文使用說明
揚(yáng)聲器控制MVME2603/2604基板向14針組合LED夾層/遠(yuǎn)程復(fù)位接頭，J1。當(dāng)J1為當(dāng)移除LED夾層時(shí)，用作遠(yuǎn)程重置連接器揚(yáng)聲器輸出信號(hào)可以通過電纜連接到外部揚(yáng)聲器，以獲得蜂鳴音。關(guān)于J1的引腳分配，請(qǐng)參閱第4章中的表4-1，連接器引腳分配。PM603/604處理器目前，您可以選擇PowerPC 603或PowerPC 604具有16MB至256MB ECC DRAM、256KB 2級(jí)的處理器芯片高速緩存（二級(jí)緩存）和高達(dá)9MB的閃存。
LT9673a模塊二級(jí)緩存和1MB 16位閃存位于MVME2603/2604基板上。ECC DRAM和4MB或8MB額外（64位）閃存位于RAM200內(nèi)存夾層上。PowerPC 603是一個(gè)64位處理器，具有32KB的片上緩存（16KB）數(shù)據(jù)緩存和16KB指令緩存）。PowerPC 604是64位的具有32KB片上緩存（16KB數(shù)據(jù)緩存和16KB）的處理器指令緩存）。Raven橋接器控制器ASIC提供了PowerPC微處理器總線和PCI本地總線。電氣方面Raven芯片是64位PCI連接。四個(gè)可編程地圖解碼器在每個(gè)方向上，在PowerPC之間提供靈活的尋址微處理器總線和PCI本地總線。閃存MVME2603/2604基板提供1MB 16位閃存內(nèi)存位于兩個(gè)8位插槽中。RAM200內(nèi)存夾層可容納4MB或8MB額外的64位閃存。板載監(jiān)視器/調(diào)試器PPCBug位于閃存芯片中。PPCBug提供以下功能：? 啟動(dòng)操作系統(tǒng)? 重置后初始化? 顯示和修改配置變量? 運(yùn)行自檢和診斷? 更新固件ROM在正常操作下，閃存設(shè)備處于“只讀”模式內(nèi)容是預(yù)定義的，可以防止意外寫入由于斷電情況。然而，出于編程目的，編程電壓始終提供給設(shè)備和閃光燈可以通過執(zhí)行適當(dāng)?shù)某绦蛎顏硇薷膬?nèi)容序列請(qǐng)參閱第三方數(shù)據(jù)表和/或PPCBug附錄D中列出的固件包用戶手冊(cè)，相關(guān)文檔，以獲取有關(guān)修改的更多特定于設(shè)備的信息Flash內(nèi)容。
Speaker Control
The MVME2603/2604 base board supplies a SPEAKER_OUT signal to the
14-pin combined LED-mezzanine/remote-reset connector, J1. When J1 is
used as a remote reset connector with the LED mezzanine removed, the
SPEAKER_OUT signal can be cabled to an external speaker to obtain a
beep tone. For the pin assignments of J1, refer to Table 4-1 in Chapter 4,
Connector Pin Assignments.
PM603/604 Processor
At present, you have the choice of a PowerPC 603 or a PowerPC 604
processor chip with 16MB to 256MB of ECC DRAM, 256KB of level 2
cache (L2 cache), and up to 9MB of Flash memory. The L2 cache and
1MB of 16-bit Flash memory reside on the MVME2603/2604 base board.
The ECC DRAM and 4MB or 8MB of additional (64-bit) Flash memory
are located on the RAM200 memory mezzanine.
The PowerPC 603 is a 64-bit processor with 32KB on-chip cache (16KB
data cache and 16KB instruction cache). The PowerPC 604 is a 64-bit
processor with 32KB on-chip cache (16KB data cache and 16KB
instruction cache).The Raven bridge controller ASIC provides the bridge between the
PowerPC microprocessor bus and the PCI local bus. Electrically, the
Raven chip is a 64-bit PCI connection. Four programmable map decoders
in each direction provide flexible addressing between the PowerPC
microprocessor bus and the PCI local bus.
Flash Memory
The MVME2603/2604 base board has provision for 1MB of 16-bit Flash
memory in two 8-bit sockets. The RAM200 memory mezzanine
accommodates 4MB or 8MB of additional 64-bit Flash memory.
The onboard monitor/debugger, PPCBug, resides in the Flash chips.
PPCBug provides functionality for:
? Booting the operating system
? Initializing after a reset
? Displaying and modifying configuration variables
? Running self-tests and diagnostics
? Updating firmware ROM
Under normal operation, the Flash devices are in “read-only” mode, their
contents are pre-defined, and they are protected against inadvertent writes
due to loss of power conditions. However, for programming purposes,
programming voltage is always supplied to the devices and the Flash
contents may be modified by executing the proper program command
sequence. Refer to the third-party data sheet and/or to the PPCBug
Firmware Package User’s Manual, listed in Appendix D, Related
Documentation, for further device-specific information on modifying
Flash contents.
