10QT01模塊,ABB使用配置說明
總線開關(guān)ASIC提供處理器總線之間的接口（MC88110總線）和本地外圍總線（MC68040兼容總線）。參考MVME197LE框圖（圖1-1）。它提供總線仲裁MC88110總線，用作七級中斷處理程序。它有兩條總線的可編程地圖解碼器，以及上的寫后緩沖區(qū)每個都有兩個滴答計(jì)時器和四個32位通用寄存器。DCAM（DRAM控制器和地址多路復(fù)用器）ASIC提供DRAM的地址多路復(fù)用器和RAS/CA/寫控制以及ECDM的數(shù)據(jù)控制。
10QT01模塊ECDM（糾錯和數(shù)據(jù)多路復(fù)用器）ASIC多路復(fù)用在DRAM陣列上的四條數(shù)據(jù)路徑之間。由于設(shè)備處理16位，MVME197LE上需要四個這樣的設(shè)備來容納64位MC88110微處理器的數(shù)據(jù)總線。單位錯誤校正和在ECDM中執(zhí)行雙位檢測。PCCchip2（外圍通道控制器）ASIC提供兩個滴答定時器以及與LAN芯片、SCSI芯片、串口芯片和打印機(jī)端口和BBRAM（電池備用RAM）。具有MC68040總線接口的VMEbus接口芯片是一種稱為VMEchip2。VMEchip2包括兩個滴答計(jì)時器、一個看門狗計(jì)時器、，用于主接口和從接口的可編程地圖解碼器，以及VMEbus到/來自本地外圍總線DMA控制器，VMEbus到/來自本地外圍總線非DMA編程訪問接口，VMEbus中斷器、VMEbus系統(tǒng)控制器、VMEbus中斷處理程序和VMEbus請求者。本地外圍總線到VMEbus的傳輸可以是D8、D16或D32。VMEchip2然而，到VMEbus的DMA傳輸可以與塊傳輸一樣寬64位（BLT）。要求這些電路板的設(shè)計(jì)應(yīng)符合以下要求文件：? VMEbus規(guī)范（IEEE 1014-87）? EIA-232-D串行接口規(guī)范? SCSI規(guī)范，ANSI
The BusSwitch ASIC provides an interface between the processor bus
(MC88110 bus) and the local peripheral bus (MC68040 compatible bus). Refer
to the MVME197LE block diagram (Figure 1-1). It provides bus arbitration for
the MC88110 bus and serves as a seven level interrupt handler. It has
programmable map decoders for both busses, as well as write post buffers on
each, two tick timers, and four 32-bit general purpose registers.
The DCAM (DRAM Controller and Address Multiplexer) ASIC provides the
address multiplexers and RAS/CAS/WRITE control for the DRAM as well as
data control for the ECDM.
The ECDM (Error Correction and Data Multiplexer) ASIC multiplexes
between four data paths on the DRAM array. Since the device handles 16 bits,
four such devices are required on the MVME197LE to accommodate the 64-bit
data bus of the MC88110 microprocessor. Single-bit error correction and
double-bit detection is performed in the ECDM.
The PCCchip2 (Peripheral Channel Controller) ASIC provides two tick timers
and the interface to the LAN chip, the SCSI chip, the serial port chip, the
printer port, and the BBRAM (Battery Backup RAM).
A VMEbus interface chip with an MC68040 bus interface is one ASIC called the
VMEchip2. The VMEchip2 includes two tick timers, a watchdog timer,
programmable map decoders for the master and slave interfaces, and a
VMEbus to/from the local peripheral bus DMA controller, a VMEbus to/from
the local peripheral bus non-DMA programmed access interface, a VMEbus
interrupter, a VMEbus system controller, a VMEbus interrupt handler, and a
VMEbus requester.
Local peripheral bus to VMEbus transfers can be D8, D16, or D32. VMEchip2
DMA transfers to the VMEbus, however, can be 64 bits wide as Block Transfer
(BLT).
Requirements
These boards are designed to conform to the requirements of the following
documents:
? VMEbus Specification (IEEE 1014-87)
? EIA-232-D Serial Interface Specification, EIA
? SCSI Specification, ANSI
