NI PXI-8423串行板卡，PXI-8423說明書文檔
中斷確認(rèn)映射MC68030將中斷確認(rèn)周期與通過將二進(jìn)制值%1111放在A19上的其他CPU空間周期-A16。它還指定了使用A03-A01。中斷處理程序選擇其中的哪個設(shè)備正在確認(rèn)級別。請參閱第5章中的中斷處理程序。VMEbus內(nèi)存映射以下段落描述了MVME147的映射VMEbus masters查看的資源。
NI PXI-8423串行板卡MVME147板載DRAM、VMEchip全局寄存器和VMEbus中斷器響應(yīng)VMEbus主機的訪問。不MVME147上的其他設(shè)備響應(yīng)此類訪問。VMEbus訪問MVME147板載DRAM
當(dāng)VMEbus主機訪問MVME147板載DRAM時，它必須使用由控制寄存器選擇的地址修飾符執(zhí)行此操作在VMEchip和由控制寄存器選擇的基址中在PCC中。參見表3-6。CPU地址空間MVME147響應(yīng)兩種類型的CPU空間周期：? 協(xié)處理器? 中斷確認(rèn)MC68030能夠生成其他類型的CPU空間周期（使用斷點確認(rèn)、訪問級別控制或移動指令），但MVME147沒有回應(yīng)他們。協(xié)處理器寄存器映射MC68882是MVME147上唯一的協(xié)處理器。地圖每當(dāng)MPU執(zhí)行Cp ID為%001（FC2-FC0=%111和A19）的協(xié)處理器循環(huán)-A13=%0010001）。MC68882寄存器由A4-A0選擇為如表3-5所示。
Interrupt Acknowledge Map
The MC68030 distinguishes interrupt acknowledge cycles from
other CPU space cycles by placing the binary value %1111 on A19-
A16. It also specifies the level that is being acknowledged using
A03-A01. The interrupt handler selects which device within that
level is being acknowledged. Refer to Interrupt Handler in Chapter 5.
VMEbus Memory Map
The following paragraphs describe the mapping of MVME147
resources as viewed by VMEbus masters.
The MVME147 onboard DRAM, VMEchip global registers, and
VMEbus interrupter respond to accesses by VMEbus masters. No
other devices on the MVME147 respond to such accesses.
VMEbus Accesses to MVME147 Onboard DRAM
When a VMEbus master accesses the MVME147 onboard DRAM, it
must do so using the address modifier selected by a control register
in the VMEchip and the base address selected by a control register
in the PCC. Refer to Table 3-6.CPU Address Space
The MVME147 responds to two types of CPU space cycles:
? Coprocessor
? Interrupt acknowledge
The MC68030 is capable of generating other types of CPU space
cycles (using breakpoint acknowledge, access level control, or
MOVES instructions), but the MVME147 has no devices that
respond to them.
Coprocessor Register Map
The MC68882 is the only coprocessor on the MVME147. The map
decoder selects the MC68882 any time the MPU executes a
coprocessor cycle with Cp-ID of %001 (FC2-FC0 =%111 and A19-
A13 =%0010001). The MC68882 registers are selected by A4-A0 as
shown in Table 3-5.
