ASEA BROWN BOVERI 8034308S模擬輸入板
雖然這些I/O端口是為列出的功能保留的，但它們未在VMIVME-7740上實(shí)現(xiàn)。此處列出這些端口是為了讓用戶了解這些端口的標(biāo)準(zhǔn)PC/AT使用情況。PC/AT中斷除了I/O端口地址之外，I/O設(shè)備還有一個(gè)單獨(dú)的硬件中斷線路分配。分配給每個(gè)中斷線的是內(nèi)存中$00000至$003FF的256向量中斷表中的相應(yīng)中斷向量。表3-3列出了16個(gè)可屏蔽中斷和單個(gè)不可屏蔽中斷（NMI）及其功能。第45頁(yè)的表3-4詳細(xì)說明了中斷向量表中的向量。表3-4中還為實(shí)模式和保護(hù)模式定義了十六進(jìn)制和十進(jìn)制中斷數(shù)。VMIVME-7740上的中斷硬件實(shí)現(xiàn)是圍繞PC/AT架構(gòu)構(gòu)建的計(jì)算機(jī)的標(biāo)準(zhǔn)，該架構(gòu)是從IBM PC/XT演變而來的。在IBM PC/XT計(jì)算機(jī)中，僅存在八條中斷請(qǐng)求線，在PIC處編號(hào)從IRQ0到IRQ7。
While these I/O ports are reserved for the listed functions, they are not implemented on the VMIVME-7740. They are listed here to make the user aware of the standard PC/AT usage of these ports.PC/AT Interrupts In addition to an I/O port address, an I/O device has a separate hardware interrupt line assignment. Assigned to each interrupt line is a corresponding interrupt vector in the 256-vector interrupt table at $00000 to $003FF in memory. The 16 maskable interrupts and the single Non-Maskable Interrupt (NMI) are listed in Table 3-3 along with their functions. Table 3-4 on page 45 details the vectors in the interrupt vector table. The interrupt number in HEX and decimal are also defined for real and protected mode in Table 3-4. The interrupt hardware implementation on the VMIVME-7740 is standard for computers built around the PC/AT architecture, which evolved from the IBM PC/XT. In the IBM PC/XT computers, only eight interrupt request lines exist, numbered from IRQ0 to IRQ7 at the PIC.
