CVC750BE101 IGCT模塊
MFP/MFC模塊操作控制模塊（MFP/MFC）指導(dǎo)發(fā)射器的操作并保持其操作策略。功能代碼132（模擬輸入/從機）讀取FEC模塊的模擬輸入?？刂颇K中的功能代碼133（智能發(fā)射器定義，僅適用于IMFEC11）的配置決定了每個智能發(fā)射器的操作策略。當(dāng)控制模塊在其配置中處于功能代碼132和可選的功能代碼133的執(zhí)行模式時，操作開始。當(dāng)控制模塊進入執(zhí)行模式時，它將操作策略下載到FEC模塊。功能操作FEC模塊可分為IMFEC12的四個功能塊和IMFEC11的五個功能塊。圖2-1顯示了IMFEC1模擬輸入（FEC）模塊的框圖。功能塊包括：?模塊輸入/輸出（僅適用于IMFEC11的AC耦合器和FSK多路復(fù)用器）。?通信電路（僅限IMFEC11）。?微處理器和控制邏輯。?模數(shù)轉(zhuǎn)換器。?I/O擴展器總線接口。以下各節(jié)解釋構(gòu)成IMFEC1電路的功能塊的操作。
微處理器和控制邏輯電路
車載微處理器和控制邏輯協(xié)調(diào)模塊功能。微處理器有四個主要功能：?將數(shù)字?jǐn)?shù)據(jù)存儲在隨機存取存儲器（RAM）中。?通過模數(shù)控制芯片協(xié)調(diào)模數(shù)轉(zhuǎn)換。?準(zhǔn)備發(fā)送至智能變送器的數(shù)字命令（僅限IMFEC11）。?讀取并向控制模塊（MFP/MFC）發(fā)送數(shù)據(jù)。微處理器直接連接到8千字節(jié)的隨機存取存儲器。該存儲器用作過程數(shù)據(jù)和變送器配置信息的存儲區(qū)域。微處理器通過ADC電路協(xié)調(diào)模數(shù)轉(zhuǎn)換。微處理器從ADC電路接收轉(zhuǎn)換后的過程數(shù)據(jù)，并將其放入存儲器緩沖器中。它保留在存儲器中，直到控制模塊請求處理數(shù)據(jù)或微處理器用新值更新它。當(dāng)微處理器接收到對過程數(shù)據(jù)的請求時，它將數(shù)據(jù)從存儲器緩沖器傳輸?shù)较冗M先出（FIFO）移位寄存器，控制模塊可以通過I/O擴展器總線接口訪問該寄存器。
MFP/MFC MODULE OPERATION
The controlling module (MFP/MFC) directs the operation of the transmitters and holds their operating strategy. Function code 132 (analog input/slave) reads the analog inputs of the FEC module. The configuration of function code 133 (smart transmitter definition, for IMFEC11 only) in the controlling module determines the operating strategy of each smart transmitter. Operation begins when the controlling module is placed in the execute mode with function code 132, and optionally with function code 133, in its configuration. When the controlling module enters the execute mode, it downloads the operating strategy to the FEC module. FUNCTIONAL OPERATION The FEC module can be divided into four functional blocks for the IMFEC12 and five functional blocks for the IMFEC11. Figure 2-1 shows a block diagram of the IMFEC1 Analog Input (FEC) module. The functional blocks are: ? Module inputs/outputs (AC coupler and FSK multiplexer for the IMFEC11 only). ? Communication circuitry (IMFEC11 only). ? Microprocessor and control logic. ? Analog-to-digital converter. ? I/O expander bus interface. The following sections explain the operation of the functional blocks that make up the IMFEC1 circuitry.
Microprocessor and Control Logic Circuitry
The on-board microprocessor and control logic coordinates module functions. The microprocessor has four main functions: ? Storing the digital data in random access memory (RAM). ? Coordinating analog-to-digital conversion through the analog-to-digital control chip. ? Preparing digital commands to send to the smart transmitters (IMFEC11 only). ? Reading and sending data to the controlling module (MFP/ MFC). The microprocessor directly links to eight kilobytes of random access memory. This memory serves as a storage area for process data and transmitter configuration information. The microprocessor coordinates analog-to-digital conversions through ADC circuitry. The microprocessor takes the converted process data it receives from the ADC circuitry and places it into a memory buffer. It remains in memory until the controlling module makes a request for process data or the microprocessor updates it with a new value. When the microprocessor receives a request for process data, it transfers that data from the memory buffer to a first in first out (FIFO) shift register where the controlling module can access it through the I/O expander bus interface.
