GDD360C用戶手冊,ABB工控卡件
電路板ID寄存器VMIVME-3112寄存器集的第一個字位置是只讀寄存器。它總是讀取08XX（十六進制；最后兩位數(shù)字不是指定）。其他VMIC產品具有類似的寄存器，其讀取的數(shù)據(jù)不同常數(shù)。這允許通用系統(tǒng)軟件自動確定安裝了哪些板（通過讀取預定的地址列表）。配置軟件必須能夠處理總線如果它可能讀取空位置，則出錯。
GDD360C用戶手冊3.12內置功率轉換器VMIVME-3112模擬網絡的電源由直流-直流轉換器如圖3.12-1所示。轉換器轉換5 V邏輯電源轉換為穩(wěn)壓和隔離的±15 VDC電源，負載容量為每個15 V總線上約100 mA。引言通過128與VMIVME-3112通信映射到VME短輸入/輸出的連續(xù)16位寄存器位置地址空間。大多數(shù)VMEbus CPU訪問較短的I/O空間，就好像它是一個傳統(tǒng)內存的64 KB塊。請參閱CPU手冊以確定此塊的地址。
VMIVME-3112支持字節(jié)和字（16位）訪問。訂單一個字中的字節(jié)數(shù)取決于所用CPU的型號。例如，大多數(shù)基于68000的CPU將最高有效字節(jié)放在與字相同的地址。最低有效字節(jié)位于下一個地址。注意，如果AUTOSCAN數(shù)據(jù)為讀作兩個字節(jié)，它們可能來自不同的轉換周期。這個可以在讀數(shù)中引入256計數(shù)錯誤。詳細討論了通信寄存器的功能在本節(jié)中，總結見表4.1-1。有些寄存器不是已使用，并標記為“保留”。保留寄存器可能是重復映射正?？刂萍拇嫫?。不應使用它們，因為它們可能會受到影響通過設計變更。4.2控制和狀態(tài)寄存器說明位于相對地址02H的通信寄存器是控制和狀態(tài)寄存器（CSR），并包含控制和監(jiān)控以下電路板操作：a、 模擬輸入通道選擇b、 A/D操作模式c、 開始A/D轉換d、 啟動可編程定時器e、 二的補碼選擇f、 前面板故障指示燈g、 電路板重置h、 增益延遲
BOARD ID REGISTER
The first word location of the VMIVME-3112's register set is a
read-only register. It always reads 08XX (HEX; the last two digits are not
specified). Other VMIC products have similar registers which read different
constants. This allows general-purpose system software to automatically
determine what boards have been installed (by reading from a predetermined
list of addresses). The configuration software must be able to handle a bus
error if it might read an empty location.
3.12 BUILT-IN POWER CONVERTER
Electrical power for the VMIVME-3112 analog network is supplied by
the DC-to-DC converter shown in Figure 3.12-1. The converter transforms 5 V
logic power into regulated and isolated ±15 VDC power, with a load capacity of
approximately 100 mA on each 15 V bus. INTRODUCTION
Communication with the VMIVME-3112 takes place through 128
contiguous, 16-bit register locations which are mapped into the VME short I/O
address space. Most VMEbus CPUs access the short I/O space as if it were a
64-Kbyte block of conventional memory. Consult your CPU manual to determine
the address of this block.
The VMIVME-3112 supports byte and word (16-bit) accesses. The order
of the bytes within a word depends on the model of CPU used. For instance, most
68000-based CPUs put the most significant byte at the same address as the word.
The least significant byte is at the next address. Note that if the AUTOSCAN data is
read as two bytes, they may be from different conversion cycles. This can
introduce a 256-count error in the reading.
Functions of the communications registers, which are discussed in detail
within this section, are summarized in Table 4.1-1. Some of the registers are not
used, and are labeled "reserved". Reserved registers may be duplicate mappings
of normal Control Registers. They should not be used, since they could be affected
by a design change.
4.2 CONTROL AND STATUS REGISTER DESCRIPTIONS
The communication register located at relative address 02H is the
Control and Status Register (CSR), and contains all of the flags necessary to
control and monitor the following board operations:
a. Analog input channel selection
b. A/D operating modes
c. Start A/D conversion
d. Start Programmable Timer
e. Two's complement selection
f. Front panel Fail Indicator
g. Board RESET
h. Gain Delay
