HIEE401091R0002模擬量卡件,ABB怎么使用
訪問PIB(PCI/ISA橋)的配置空間控制器通過CONADD和CONDAT執(zhí)行Raven bridge控制器中的(配置地址和數(shù)據(jù))寄存器ASIC。寄存器分別位于偏移量$CF8和$CFC,來自PCI輸入/輸出基址。實時時鐘/NVRAM/計時器功能MVME2603/2604采用SGS湯姆遜表面貼裝M48T59/T559 RAM和時鐘芯片,提供8KB的非易失性靜態(tài)數(shù)據(jù)RAM、實時時鐘和看門狗定時器功能。
HIEE401091R0002模擬量卡件該芯片提供時鐘、振蕩器、晶體、電源故障檢測、存儲器寫入保護(hù),8KB的NVRAM,以及一個由兩個? 包含實時時鐘的28針330mil SO設(shè)備振蕩器,電源故障檢測電路,定時器邏輯,8KB靜態(tài)RAM和電池的鍍金插座? SNAPHAT?電池包含一個晶體和電池SNAPHAT電池組安裝在M48T59/T559的頂部裝置電池外殼帶有鍵,以防止反向插入。
時鐘提供秒、分、時、日、日、月和年BCD 24小時格式。28、29(閏年)和30天的修正月份是自動生成的。時鐘不會產(chǎn)生中斷。雖然M48T59/T559是8位設(shè)備,但8位、16位和32位訪問支持從ISA總線到M48T59/T559。請參閱MVME2603/2604程序員參考指南和M48T59/T559數(shù)據(jù)表,均列在附錄D中,相關(guān)文檔,以獲取詳細(xì)的編程和電池壽命信息??删幊潭〞r器在本地處理器可用的資源中,有許多可編程定時器。定時器并入PIB控制器,并Z8536 CIO設(shè)備(如第1-2頁圖1-1和圖2所示)第3-4頁的3-1)。可以對其進(jìn)行編程以產(chǎn)生周期性中斷到處理器。間隔計時器PCI-ISA網(wǎng)橋控制器有三個內(nèi)置計數(shù)器,分別是相當(dāng)于82C54可編程間隔計時器中的值。這個在PIB控制器中,計數(shù)器被分組為一個計時器單元,即計時器1。每個計數(shù)器輸出具有特定功能:? 計數(shù)器0與中斷請求行IRQ0相關(guān)聯(lián)。它可能是用于系統(tǒng)計時功能,例如時間功能。? 計數(shù)器1為ISA內(nèi)存生成刷新請求信號。這MVME2603/2604中未使用計時器。
Accesses to the configuration space for the PIB (PCI/ISA Bridge)
controller are performed by way of the CONADD and CONDAT
(Configuration Address and Data) registers in the Raven bridge controller
ASIC. The registers are located at offsets $CF8 and $CFC, respectively,
from the PCI I/O base address.
Real-Time Clock/NVRAM/Timer Function
The MVME2603/2604 employs an SGS-Thomson surface-mount
M48T59/T559 RAM and clock chip to provide 8KB of non-volatile static
RAM, a real-time clock, and a watchdog timer function. This chip supplies
a clock, oscillator, crystal, power failure detection, memory write
protection, 8KB of NVRAM, and a battery in a package consisting of two? A 28-pin 330mil SO device containing the real-time clock, the
oscillator, power failure detection circuitry, timer logic, 8KB of
static RAM, and gold-plated sockets for a battery
? A SNAPHAT? battery housing a crystal along with the battery
The SNAPHAT battery package is mounted on top of the M48T59/T559
device. The battery housing is keyed to prevent reverse insertion.
The clock furnishes seconds, minutes, hours, day, date, month, and year in
BCD 24-hour format. Corrections for 28-, 29- (leap year), and 30-day
months are made automatically. The clock generates no interrupts.
Although the M48T59/T559 is an 8-bit device, 8-, 16-, and 32-bit accesses
from the ISA bus to the M48T59/T559 are supported. Refer to the
MVME2603/2604 Programmer’s Reference Guide and to the
M48T59/T559 data sheet, both listed in Appendix D, Related
Documentation, for detailed programming and battery life information.
Programmable Timers
Among the resources available to the local processor are a number of
programmable timers. Timers are incorporated into the PIB controller and
the Z8536 CIO device (diagrammed in Figure 1-1 on page 1-2 and Figure
3-1 on page 3-4). They can be programmed to generate periodic interrupts
to the processor.
Interval Timers
The PCI-ISA Bridge controller has three built-in counters that are
equivalent to those found in an 82C54 programmable interval timer. The
counters are grouped into one timer unit, Timer 1, in the PIB controller.
Each counter output has a specific function:
? Counter 0 is associated with interrupt request line IRQ0. It can be
used for system timing functions, such as a timer interrupt for a
time-of-day function.
? Counter 1 generates a refresh request signal for ISA memory. This
timer is not used in the MVME2603/2604.
parts: